eNews: Library Design Services


Silvaco (NanGate in the past) provides standard cell library design and optimization services both as
a fully independent 3rd party IP vendor or as a partner in the development of high performance libraries.

The most common services provided are:
ן‚· Standard Cell Library Development
ן‚· Standard Cell Library and Design Optimization
ן‚· Performance Add-On Cells
ן‚· IP Migration: Generation of Library Variants
ן‚· Library Characterization Services


Standard Cell Library Development

Silvaco has more than 20 years of experience in technology
nodes from .35um down to 20nm and now working as partner
with major foundries and fabless IC companies on 14nm. Our full
featured standard cell libraries have demonstrated maximal
density and routing performance. The cell schematic used on
more complex cells also provides options for high performance or
high density design optimizations. As part of the package, all
industry standard views (CDL netlist, LEF, GDSII, Liberty, PEX
Spice netlist, Verilog, VITAL, EDIF, OpenAccess db and others)
are provided from a consistent database. Liberty files can be
exported with all timing, power and noise models and for any
operating condition (PVT corners). Here are examples of cells
found in our standard cell libraries:

ן‚· Inverters, Buffers, Clock cells
ן‚· NAND, NOR, AND, OR cells
ן‚· AOI, OAI, AO, OA cells
ן‚· XNOR, XOR (buffered, unbuffered) cells
ן‚· MUX, IMUX cells
ן‚· D-type Latches (set, reset) and clock gate cells
ן‚· D-type Flops and Scan D-Type Flops (set, reset, both,
ן‚· Half-Adder, Full-Adder cells

Special cells such as power management, retention and special
operation cells can be added to the library. Silvaco also counts
with a vast repertory of cells for specific applications.

Few advantages of using NanGate as a library IP provider and
ן‚· High-quality DRC-clean and DFM-friendly layouts in very
short time and lower costs ג€“ due to the use of our
unique Library Creator Platform, the most advanced
layout development tool suite;
ן‚· Quick library updates (including layout DRC clean-up) when design rules are still changing ג€“ technology
exploration and PDK development phases;
ן‚· Flexibility in the specification of cells (functions, schematics);
ן‚· Option to create library variants (refer to IP migration below);
ן‚· Vast experience and know-how on standard cell libraries ranging from .35um to 14nm and in the area of application specific performance cells for CPUs and GPUs;
ן‚· Broad range of post-sales services such as library recharacterization ג€“ and very affordable.


Standard Cell Library and Design Optimization

Silvaco has large experience working in processor core
optimizations (mainly CPU and GPUs) collaborating with design
teams in leading Tier-1 companies. Even foundries have used
NanGateג€™s design and library optimization flow to achieve higher
performance in their benchmarks. In this area of IP optimization,
NanGate provides mainly two independent yet complimentary
ן‚· Standard Cell Library Optimization
ן‚· Design Optimization


Getting the best performance library involves knowing the target
application (design). And getting the best performance design
relies on the quality of the standard cell library, macros and
memories used. Even though each optimization can be done
independently ג€“ and they do provide good results -, optimizing
both libraries and design concurrently provides ultimate gains
similar to or better than those seen in custom design flows.


Contact us form more infromation

want to know more?
contact us now

Subscribe to