Timing and Power Characterization of Standard Cell Libraries, I/O Pads and Memories Accelerated by 10X through Intelligent Optimization Technology
Silvaco Inc., a leading global provider of software, IP and services for designing chips and electronic systems for semiconductor companies, today announced Viola 10X, a scalable semiconductor intellectual property (IP) characterization and modeling tool which is the latest addition to the Silvaco Foundation IP product line.
By leveraging new Intelligent Optimization delivering 10X faster performance and embedding Silvaco’s SmartSpice simulator and Jivaro-A reduction technology, the fully automated Viola 10X flow delivers accurate modeling and characterization of standard cell libraries, input/output (I/O) pad circuitry and digital memories for designs targeted at nanometer process nodes.
Viola 10X is an advanced characterization system that automatically performs static structural analysis on transistor-level netlists of standard cells and complex custom cells or macros. It uses the results of this analysis to set up complete characterization constraints and then leverages the foundry-certified, highly accurate and accelerated SmartSpice simulator to increase the overall throughput of timing, power, noise and statistical static timing analysis (SSTA) model generation. Viola 10X not only offers faster characterization capabilities, it supports all industry-standard model formats and includes a closed-loop model validation flow that allows users to seamlessly launch third-party tools to verify the generated models.
Viola 10X: Faster, More Reliable Model Sign-off
At the heart of Viola 10X are Silvaco’s proprietary circuit-function recognition, vector generation, SmartSpice simulation and Jivaro-A reduction technologies. Each contributes to the ease of setup, accelerated characterization throughput and quality of model sign-off in Silvaco’s characterization solution:
- Leveraging intelligent algorithms, Viola 10X automatically recognizes and models the functionality of standard cells and generates an efficient vector set for all timing arcs. By eliminating time-consuming, manual analyses, Viola 10X dramatically reduces the time required to set up and characterize I/O pads across a wide range of functional modes, process points, supply voltages and junction temperatures. The ability to efficiently handle the increasing number of process, voltage, temperature (PVT) points and operating modes is critical to nanometer design success.
- The smart topology-driven vector generation of Viola 10X features unique structure-based vector optimization and an intrinsic, simulation-induced constraint acceleration algorithm. These features eliminate vector redundancy and avoid unnecessary simulation while maintaining characterization accuracy. Viola 10X also offers a flexible methodology, allowing the user to supply a vector set and its sequence for specific measurements.
- Viola 10X supports commercially available SPICE simulators, including Silvaco’s SmartSpice. When used in conjunction with SmartSpice, the optimized vector generation capabilities of Viola 10X deliver an order-of-magnitude faster throughput than previous generations of Viola, without any loss of accuracy. SmartSpice is a full SPICE simulator in wide use by analog/mixed-signal designers, foundries and IP developers down to 5nm.
- Jivaro-A is the industry-leading RC parasitic reduction technology for layout parasitic extraction (LPE). Its circuit optimization is based on accuracy requirements, stability of simulation, realistic values, reliability of analysis and verifiability. Jivaro-A is not a simple data crunching or filtering tool. Optimized for SPICE netlists, it reduces simulation time, increases accuracy compared to built-in reduction of circuit simulators and offers blazing fast processing.